Re: VME320? (fwd)

[Elton Smith <elton@jlab.org>]

---------- Forwarded message ----------
Date: Wed, 05 Sep 2001 09:56:28 -0700
From: Chris Cuevas <cuevas@jlab.org>
To: Elton Smith <elton@jlab.org>
Subject: Re: VME320? (fwd)

Elton,

I have attached a brief paper on the subject of VME protocols and newer
developments/modifications to the original 1981 VME standard.  Fernando points
out some positive reasons to consider the VME320 spec and if memory serves
this has been discussed before.  I believe one of the primary concerns with
using the '320 spec was the issue of proprietary controllers[cpu].  At any
rate, this topic will impact the "final" design for the Hall D TDC.

-Chris
x5053
~~~~~~~~~~~~~~~~~~

Elton Smith wrote:

> ---------- Forwarded message ----------
> Date: Tue, 4 Sep 2001 14:50:01 -0400
> From: Fernando J. Barbosa <barbosa@jlab.org>
> To: Elton Smith <elton@jlab.org>
> Subject: VME320?
>
> Hi , Elton. At our last meeting, we briefly discussed the possibility of
> using dedicated pins for distribution of the reference clock, trigger,
> syncreset and start signals in differential mode. The TDCs will also have
> these input pins present on the front panel for use in systems where the
> backplane implementation is not required nor feasible.
>
>     Standard VME backplanes have 64 pins of User Defined pins on P2/J2.
> Some of these could be used for signal distribution by means of wired
> piggy-back connectors, as opposed to designing a special backplane.
>
>     VME64x adds 46 User Defined pins to P2/J2 and has standard provisions
> for an additional connector (P0/J0) between the P1/J1 and P2/J2
> connectors. This connector adds 95 User Defined pins. Boards using the
> P0/J0 connectors cannot be installed on standard VME backplanes as there
> is a bar for support and rigidity of the backplane in this location. The
> piggy-back connections mentioned above can also be implemented on this
> backplane.
>
>     The most recent VME standard is called VME320 for 320 Mbytes/sec
> transfers. VME320 builds on VME64x with two distinct enhancements:
> Synchronous Source Termination (SST) and "lumped" backplane layout. Two
> edge transfers are also implemented as on VME64x. The traces in VME320
> (a.k.a. 2eSST VME) are routed from slot 1 (master) to slot 11 and then
> from slot 11 to all other slots (2 through 21). This technique doubles the
> speed on the backplane as compared to earlier VME standards as those
> backplanes had traces routed from slot 1 to slot 2, from slot 2 to slot 3
> and so on. Because of the reflective nature of those earlier backplanes, a
> signal from slot 1 to slot 2 could only be qualified after the signal
> propagated to slot 21 and back to slot 2. The SST doubles the speed once
> more to 320 Mbytes/Sec because transmission is synchronous and does not
> require the handshake overhead required for master/slave acknowledgements.
> VME320 backplanes are already available.
>
>     I suggest adopting VME320 as a standard for Hall D, as well as, a
> standard for future upgrades at the lab. We should also discuss signal
> distribution schemes for backplanes and systems in general at our next
> Hall D TDC meeting.
>
>     Best regards,
>         Fernando

vmeprotocol-pp.pdf