Wed 9/12 2pm: Multi-Threading - JLab Technical Computing seminar

[Sandy Philpott <sandy.philpott@jlab.org>]

Today!

> Multi-Threading Performance on Commodity Multi-core Processors
> Jie Chen
> Wednesday September 12, 2007
> CEBAF Center A110 2pm
> 
> Multi-core processors based commodity servers recently become building blocks
> for high performance computing Linux clusters. The multi-core processors
> deliver better performance-to-cost ratios relative to their single-core
> predecessors through on-chip multi-threading. However, they present challenges
> in developing high performance multi-threaded code. In this paper we
> study the performance of different software barrier algorithms on Intel
> Xeon and AMD Opteron multi-core processor based servers. Especially, we
> explore how different memory subsystems, such as shared bus or ccNUMA,
> and their cache coherence protocols effect the performance of barrier
> algorithms. In addition, we compare multi-threading software overhead
> between OpenMP directives and a locally developed threading library that utilizes
> optimized barrier algorithms along with low overhead locking primitives. We find
> that OpenMP implementations provide high performance run-time libraries coupled
> with excellent compiler directives with overhead slightly more than the carefully
> optimized library.
> 
> Jie currently leads the Scientific Computing software development team in the
> IT division. He started working at JLab in 1992 and has worked in many computing
> projects in several divisions over the last 15 years.