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Re: TDC board discussion (fwd from Gerard)



Hall D Electronics:


---------- Forwarded message ----------
Date: Tue, 07 Aug 2007 09:48:06 -0400
From: Gerard Visser <gvisser@indiana.edu>
To: Elton Smith <elton@jlab.org>, Fernando J. Barbosa <barbosa@jlab.org>
Subject: Re: TDC board discussion

Hi Elton, Fernando,
	For what it's worth, I think this is a good plan.
	The pulser circuit will be defined as part of the ADC125 development, I
can supply circuit details later; will be included in the ADC125
prototypes. I would suggest that it connects to the otherwise unused
pair on the 34-pin 100 mil connector version too, just in case some
future usage of the pulser in another system comes up.

	Gerard



Elton Smith wrote:
> Hall D Electronics:
>
>
> Attending: Chris, Ed, Dave A., Fernando, Elton, Elke, Simon, Dan (did I
> forget anyone?)
> Notes by Elton and Fernando.
>
> On Monday, Aug 6, we had a discussion about the number of new TDC boards
> that would be required and what format they would take. Below is a
> consensus proposal that emerged from the meeting.
>
> 1. There will be a single TDC board design.
> 2. The TDC board will have LVDS inputs
> 3. The board will be able to support 8 F1 TDC chips.
> 4. This design will apply to all new users at Jlab. The old design will
> still be supported and can be fabricated at any time, if needed.
> 5. The board holds 8 F1 chips = 64 ch low resolution (60 ps)/ = 32 ch high
> resolution (120 ps) [55 ps/115 ps, actual].
> 6. External RAM added to board to assist with buffering required for high
> rate capability.
>
> Note: VXS may also be implemented if cost/convenience can be justified.
> Presently the signal distribution (clock, sync, trigger) is implemented
> with a board and cables on the back of the backplane and this is ok.
>
> For use with GlueX, the board will be configured in two ways:
> 1. PMT TDC
> a. TDC in high resolution option of 60 ps
> b. 32- channels per board
> c. Input connectors will the common 34-pin 0.050" pitch 17-pair ribbon
> cables
> d. This TDC will be feed by a splitter/disc board which will be needed
> for PMT systems, in particular the Bcal. This splitter/disc will
> have analog inputs --LVDS Discriminator Output to TDCs + Analog Output to
> fADC-250. Note that the analog output must be conditioned to meet the
> dynamic range of the fADC.
>
> 2. DC TDC
> a. TDC in low resolution option of 120 ps
> b. 48- channels per board
> c. Input connectors wil be the fine pitch 0.025" 24-pair ribbon cables.
> d. Additional line output which can be used to pulse the preamp boards
> (24/48 channels at a time?). The requirement for this pulser need to be
> detailed. Although the details have not been worked out yet, the pulser
> can be easily generated by the FPGA. A driver will provide the required current
> and levels.
> e. The board will be feed directly from the DC preamp boards.
>
> Note: The PMT TDC (F1TDC-PMT?) and the DC TDC (F1TDC-DC?) are identical
> except for the front panel and input connectors. We may decide not to
> install 2 F1 chips on those boards destined to be used as F1TDC-DCs.
>
> Comment from Fernando: I believe this to be an excellent decision because
> it minimizes the impact on the physics due to multiple scattering, uses standard
> commercially available and robust connectors, matches the detector
> design constraints and minimizes the use of engineering resources.
>
> Comments and suggestions are welcome.
>
> Cheers, Elton.