Meeting Wed Dec 12 / Testing of F1 prototype

[Elton Smith <elton@jlab.org>]

Meeting Wed Dec 12 / Testing of F1 prototype
--------------------------------------------

At our last meeting, we decided to begin discussions on how to test the F1
prototype. Dave Abbott agreed to lead this discussion.

One option would be to input a precise clock into each channel and measure
the jitter relative to the expected clock edge. This would be similar to
measuring a submultiple of the RF clock frequency, which we do in Hall B
as a reference for precise time-of-flight timing. This would allow us to
measure jitter, linearity, frequency response, etc.

Some references that might be useful from our Hall B experience are given
below:

CLAS-NOTE 091-022 "FASTBUS TDCs for the CLAS TOF"
CLAS-NOTE 093-014 "Tests of Pre-production Lecroy 1872A TDC"
CLAS-NOTE 093-017 "Calibrating CLAS FASTBUS TDCs"
CLAS-NOTE 095-002 "First-Article Testing of LeCroy 2313 Discriminator for
                   PMT Applications"
CLAS-NOTE 096-020 "Performance Testing of the Drift Chamber Pipeline TDCs"

Cheers, Elton.



-- 
Elton Smith
Jefferson Lab
elton@jlab.org
(757) 269-7625