Test pulser for FDC calibration and other FDC issues

[Simon Taylor <staylor@jlab.org>]

Dear all:

Here are some thoughts about the FDC electronics that I hope will generate
some discussion.

My studies of the prototype indicate that a channel-to-channel gain
calibration scheme is necessary to get the optimum position resolution.
This ment injecting a known amount of charge into each strip channel.  In
practice I used several different charge amounts (via attenuation) to
check the linearity of the preamp response.  In order to implement such a
scheme Gerard proposed using one pair of wires from the twisted pair cable
connecting the front-end boards to the readout electronics to control a pulser
on the preamp boards we would use for the final FDC design.
This sounds like a good idea to me.  I am mentioning this because it has
implications for the design of the drift-chamber preamp boards (and the
FADCs for the FDC) and want to make sure the feature does not get left
off.

To simplify the design of the front end (preamp boards) I think it makes
sense to have the boards for the cathode and anode signals be the same
with a minor modification to account for the opposite polarity of the
signals.  Gerard proposed having 24 channels (3 ASICs with 8 channels
each) on each board so that we would use 25-pair cables to connect between
the preamp boards and the flash-ADCs we would use to read out (at least)
the cathode channels.  I think this is also a good suggestion because it cuts
down on the cable count but it has further ramifications for the design of the
FDC readout system.  I have not been able to demonstrate that we can obtain
the desired time resolution from the flash-ADCs and the old nominal design
called for reading out the wires with F1 TDCs anyway.  If we use the F1 TDCs
then there is potentially a cable mismatch (the current F1 design uses 34-pin
connectors) and we would have to add discriminators somewhere in the
chain.  We are working on shaping the pulses so that we can refine the
algorithm for picking off the time from the FADC data, so the last point
may be moot, but until we can demonstrate that this works, the F1 TDC
option is still on the table for the anode wires.

Simon