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Re: Struck ADC test clock source



Hi Gerard,

I am out with the cold. I have some suggestions regarding the clock circuit.

I really cannot commit to do any real work on the circuit that you 
provided other than just provide some guidance to Kim once she's doing 
the layout. I am also forwarding your diagram to Kim Shinault 
(kshinaul@jlab.org).

Interacting with Kim will be easy as you also have PCAD. My suggestion:

1. Kim will generate a schematic starting from your diagram and 
interfacing with you for cross-checks.

2. Kim will layout the board. I can provide some guidance, if needed.

3. Kim will procure the boards and assembly in-house. Perhaps 10 units 
is a good idea for future use. It will be easy to get additional ones 
later, if needed.

4. The units will be shipped to you for testing and QA

As for schedules, I believe this will take over 4 weeks from start to 
delivery to users. Dan, Curtis, Yves and Simon need to plan accordingly.

Regards,
Fernando



Gerard Visser wrote:
> Hi Fernando,
>     Per our discussion this morning Kim is going to make the test 
> clock board, right? I think this sounds great! It is the best way to 
> move forward without upsetting other schedules.
>     I have attached here my schematic sketch of what the board might 
> look like. Of course there are many ways to do it, maybe you already 
> have something else / something better in mind. I don't have any 
> objections!
>     If you do care to follow the approach I sketch here, I will be 
> more than happy to review the schematic that Kim has entered prior to 
> the layout work. It's a pretty simple board but we should still avoid 
> any mistakes if possible.
>     The requirements of this board, I think, are the following:
>
> 1. Use an on-board LVPECL or LVDS differential-output oscillator 
> module of a very low jitter type (such as the Epson EG2102CA which is 
> a SAW oscillator). Frequency tolerance should be < 100ppm.
>
> 2. Fanout out to not less than three outputs using an LVPECL-LVPECL or 
> LVDS-LVPECL clock fanout part. I choose the 8314AGI-11 from IDT, it is 
> in stock at NuHorizons, it provides five outputs, this is surely 
> enough. Doing a fanout by a passive divider or something like that is 
> also possible, but an active fanout chip provides immunity against 
> jitter on one output due to reflections or noise input on the other 
> outputs. Of course we try not to inject noise or reflections into the 
> other outputs so this is maybe overkill, but it is anyway cheap.
>
> 3. For each output, convert it from from ECL to a single-ended NIM 
> output, or to differential NIM outputs if you prefer (in which case we 
> just stick a terminator in one half). [Note this is why I run the 
> "PECL" oscillator and fanout chip from -6+3.3 to -6 V.]
>
> 4. Power from something reasonable like a 6V wall adapter.
>
>     I think my design will meet these requirements.
>     I don't know if the oscillators will be ordered by you or Curtis. 
> Whoever order's them, please get 5 extra for my use on the ADC board 
> and prototyping.
>     Thanks,
>
>         Gerard

StruckTestClock.pdf