Re: Comments on Electronics Review (fwd)

[Elton Smith <elton@jlab.org>]

---------- Forwarded message ----------
Date: Wed, 16 Jul 2003 11:16:00 -0500 (EST)
From: Paul Smith <paul@xanadu.physics.indiana.edu>
To: elton@jlab.org
Cc: dzierba@indiana.edu
Subject: Re: Comments on Electronics Review


>
>Alex:
>- Question on number of channels: Alex has a slide with channel counts:  
>FADC 12k, TDC 8k and slow 10k. What is 'slow'? If it refers to slow
>controls, isn't this a fairly large number?

This includes high voltage.


>
>Paul:
>- Channel count on future FADC board (8) is very small. Density will (and 
>should) be an issue here. Number of crates?

The size of the FADC & Xilinx chips sets the spacing between channels at about
1".  The table on page 203 of the v4 design report assumes 8 channels on 6U 
cards; there are 82 crates of FADC.

The biggest # of FADC channels is for the forward drift cathodes.  If these
can use a slower conversion rate it may be possible to get higher density on
these channels.

Paul