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Re: Combined tracking meeting



Hi Elke -

  the 14-bit chip is clearly the most straight-forward and 
easy way to do it. Also, I am not keen to be saturating the
flash-ADC with the slow, forward protons.  So the simple
14-bit would be my favored solution, but I have used
non-linear flash-ADCs in the past, so they do work fine.

   Not only may the chip price fall, but we are also under the 
budgeted channel count (at the moment) by about 400. 
This might decrease if we modify the straw layout a bit,
but there is some over-all savings when we finally solidify
the numbers.

   Curtis

On Wed July 23 2008, Elke-Caroline Aschenauer wrote:
> On Wed, 23 Jul 2008, Curtis A. Meyer wrote:
> 
> Dear Gerard,
> 
> how much more money are we talking for 14bit vs 12bit. Also keep in mind
> we will not buy the boards before FY11, so mybe the prise than for 14bit
> will be the same as now 12bit, but that is speculation on my side.
> I also prefer even if there is a bit of more money involved to do the easy
> straight forward solution instead of a more complicated one. Curtis don't
> you want for dE/dx all the signal very well measured.
> 
> cheers elke
> 
> 
> > Date: Wed, 23 Jul 2008 16:49:09 -0400
> > From: Curtis A. Meyer <cmeyer@ernest.phys.cmu.edu>
> > To: Gerard Visser <gvisser@indiana.edu>
> > Cc: GlueX Tracking <tracking@gluex.org>
> > Subject: Re: Combined tracking meeting
> >
> > Hi Gerard -
> >
> >   thanks for your comments. Actually, the factor is 60, but if we are
> > willing to compromise on the slow, forward going protons, we could
> > squeeze it.
> >
> >    I also talked to Fernando about the non-linear aspect, and he also
> > mentioned that the ASIC will do that for us at some level. It would
> > be good to understand all of the effects involved.  Given the option of
> > stuffing the ~45 CDC modules with 14-bit chips might be a good
> > option to consider.
> >
> >   Cheers - Curtis
> > On Wed July 23 2008, Gerard Visser wrote:
> > > Hi Curtis,
> > > 	I read your doc, just wanted to mention that as far as the ADC125 is
> > > concerned there would certainly be an option either to have it be 14
> > > bits or to apply some nonlinear stage in the analog input signal
> > > conditioning. Actually 14 bits has for a long time been planned as the
> > > baseline pcb design so it can be stuffed either for 12 or 14 bits
> > > operation, so that all is trivial (except for the higher price of the 14
> > > bit chips). Nonlinear signal processing needs a lot of detailed
> > > discussion, it is not going to get into this summer's pcb layout, but I
> > > am pretty sure there will be enough room on the board to add something
> > > if we need to in a future version. Of course if the ADC voltage scale is
> > > made nonlinear the FPGA will also have to transform it back (with more
> > > bits) to linear form before integrating the charge, etc. But this should
> > > be feasible.
> > > 	Asking for only a factor of 20 in dynamic range sounds low, but I'll
> > > wait to hear details at the meeting...
> > >
> > > 	Gerard
> > >
> > > Curtis A. Meyer wrote:
> > > > Hi Everyone -
> > > >
> > > >   there will be a combined tracking meeting on Monday July 28 at
> > > > 1:30pm. I have created the Wiki page and put a couple of items
> > > > on the agenda. Please add appropriate items as people see
> > > > fit.
> > > >
> > > >    - Curtis
> > >
> >
> >
> >
> > --
> > Professor Curtis A. Meyer        Department of Physics
> > Phone:  (412) 268-2745          Carnegie Mellon University
> > Fax:    (412) 681-0648            Pittsburgh PA 15213-3890
> > cmeyer@ernest.phys.cmu.edu  http://www.curtismeyer.com/
> >
> 
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-- 
Professor Curtis A. Meyer        Department of Physics
Phone:  (412) 268-2745          Carnegie Mellon University
Fax:    (412) 681-0648            Pittsburgh PA 15213-3890
cmeyer@ernest.phys.cmu.edu  http://www.curtismeyer.com/