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Re: shaper gain



Hi Gerard and all,

Gerard, You are correct.

I, Simon and Dan just want to see the anode behavior on these short-term 
tests. Presently, the gain is too high, even with the low gain shaper, 
that saturation of the shaper and the ADC occur regularly. There has 
never been a plan to operate the readout chain in the non-linear region 
and the plan has always been to have a single shaper setting and have 
two gain settings on the ASIC. However, the GAS-1 only has one gain 
setting and we decided early on to "simulate" two gain settings by 
having two versions of the shaper, instead. It turns out that the gain 
of the GAS-1 is higher than planned, 3.7 mV/fC instead of 2 mV/fC (ASIC 
alone, without the output resistor networks) and the signal amplitudes, 
from both the FDC and CDC, are also higher than anticipated.

We observed that the FDC cathodes operate well with the present ASIC 
gain and with the low gain shaper (originally, the plan called for the 
high gain shaper on the cathodes). The FDC anodes will of course have 
the ASIC configured for comparator mode.

The gain for the CDC anodes will need to be lower and additional tests 
will be performed to determine the operating point. Both the CDC anodes 
and the FDC cathodes will operate within the linear range and the two 
gain settings on the GAS-2 ASIC will be set for these two applications.

For these tests on the FDC anodes, it will be easier to use a capacitive 
charge division network to prevent saturation, as per your suggestion, 
and one channel will be sufficient to study the dynamic range. In any 
case, we will only use the low gain shaper, as is, for further tests. 
However, I should emphasize that these tests on the FDC anodes are not 
really necessary, just supplemental.

Regards,
Fernando


Gerard Visser wrote:
> Hi Elke, Elton, Fernando,
>     Unless I have really misunderstood, the proposal to reduce the 
> gain of shaper board is intended only for tests in the near term, not 
> for the final system. That probably will put your mind at ease about 
> the nonlinearity and for instance dE/dx capability.
>     In the final system, the ASIC "good linear range" at the output 
> should be matched to the ADC board input range. (After accounting of 
> course for the cable losses and effect of the pulse shaping.) That is, 
> unless we decide to have some purposeful, controlled, nonlinear 
> response in the system.
>     But still, my point is that even for short term tests probably 
> this gain reduction by 5x is too much. Of course we can try it, 
> Fernando, but if the goal is to see what things would be like with 5x 
> lower gain on the ASIC, it might be better to leave the shaper board 
> alone (using the "anode" setup of the board) and to put a capacitive 
> charge division network between the detector and the ASIC input. That 
> might not be practical to do for all channels, for instance there 
> might be crosstalk implications, but on just one channel to study the 
> dynamic range it would be ok, I think.
>
>     Gerard
>
> Elke-Caroline Aschenauer wrote:
>> On Tue, 29 Jul 2008, Elton Smith wrote:
>>
>> Dear all,
>>
>> I think we have to be a bit careful. If you want to do PID you want to
>> have your information as accurate as possible. And a non linear scale
>> might impact this, because you compress your information more. This 
>> might
>> wash out differences you would in a linear scale see.
>> I would advise to look into this a bit more before taking a decission.
>>
>> bye elke
>>
>>
>>
>>
>>
>>> Date: Tue, 29 Jul 2008 08:00:37 -0400 (EDT)
>>> From: Elton Smith <elton@jlab.org>
>>> To: Curtis A. Meyer <cmeyer@ernest.phys.cmu.edu>
>>> Cc: Gerard Visser <gvisser@indiana.edu>,
>>>      Fernando J. Barbosa <barbosa@jlab.org>, Elton Smith 
>>> <elton@jlab.org>,
>>>      FDC email list <halld-tracking-hw@jlab.org>
>>> Subject: Re: shaper gain
>>>
>>>
>>> Hi Curtis and Gerard,
>>>
>>> Clearly the ADC and the ASIC outputs should match as best as 
>>> possible. But
>>> my comment is related to the non-linear region, if required, in the
>>> data. The main purpose for the dE/dx measurements is to identify 
>>> protons
>>> (distinguish them from pions). For this, we simply need to have pulse
>>> height outputs that are different for the two cases, and a non-linear
>>> scale may be fine. In other words, non-linear "corrections" per se 
>>> may not
>>> be needed, as we are not trying to determine the precise value of 
>>> energy
>>> loss, simply checking differences between two particle types.
>>>
>>> Cheers, Elton.
>>>
>>>
>>>
>>>
>>>
>>> Elton Smith
>>> Jefferson Lab MS 12H5
>>> 12000 Jefferson Ave
>>> Suite # 16
>>> Newport News, VA 23606
>>> elton@jlab.org
>>> (757) 269-7625
>>> (757) 269-6331 fax
>>>
>>> On Mon, 28 Jul 2008, Curtis A. Meyer wrote:
>>>
>>>> Hi Gerard -
>>>>
>>>>  thanks for the comment on the ADC range. I am not sure what we 
>>>> need to
>>>> do, but it would certainly be better to match as much of the linear 
>>>> range
>>>> of the ASIC to that of the Flash-ADC.  While we can probably 
>>>> correct for
>>>> the lon linear part as we move above the charge limit, I suspect 
>>>> that those
>>>> corrections are probably temperature dependent. While this may not be
>>>> a problem, we probably want to think about this up front.
>>>>
>>>>    Curtis
>>>> On Mon July 28 2008, Gerard Visser wrote:
>>>>> Hi Fernando,
>>>>>   Oh, one other point, and this is maybe worthwhile for others to
>>>>> consider too. The present "anode" setup of the shaper board, I 
>>>>> believe,
>>>>> puts the full scale of the ADC at roughly 770 fC (instantaneous input
>>>>> charge, e.g. Fe55), as documented on page 2 of
>>>>> http://argus.phys.uregina.ca/gluex/DocDB/0007/000736/003/Receiver_Shaper_Setup_for_GPC01.pdf 
>>>>>
>>>>>   In other words, the "good linear range" of the ASIC is presently 
>>>>> about
>>>>> 39 to 52% of the ADC range, depending on what you call "good".
>>>>>   With the proposed change, the "good linear range" of the ASIC 
>>>>> should
>>>>> then be about 8 to 10 % of the ADC range. I'm not sure this is really
>>>>> what we want to do... (Although of course we can try it and see. I 
>>>>> could
>>>>> be proved wrong!)
>>>>>
>>>>>   Gerard
>>>>>
>>>>> Gerard Visser wrote:
>>>>>> Hi Fernando,
>>>>>>         Ok, just to check, this will be setting the gain 1/5 of 
>>>>>> the present
>>>>>> "anode" shaper gain, is that correct? (If not, please say...)
>>>>> ...
>>>>>
>>>>
>>>>
>>>> -- 
>>>> Professor Curtis A. Meyer        Department of Physics
>>>> Phone:  (412) 268-2745          Carnegie Mellon University
>>>> Fax:    (412) 681-0648            Pittsburgh PA 15213-3890
>>>> cmeyer@ernest.phys.cmu.edu  http://www.curtismeyer.com/
>>>>
>>>
>>
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