Re: Change of Shipping address

[Mitch Newcomer <mitch@hep.upenn.edu>]

Hall D Electronics:

Package and  bonding diagram have been sent to MOSIS.  I have contacted
the socket mfgr and asked for price & availability.  One might think 
about assembling
a chip on a board if there is a long lead time on a test socket . 
Otherwise I'd say it makes most sense to test the ASICs first in a 
socket.  --Mitch

John Schaapman wrote:
> Hall D Electronics:
>
> Hi Elton,
>   The shipping address change came about because I noticed a typo in the 
> original shipping address, 'Edmond' instead of 'Edmonton'. So I contacted 
> our secretary, Suzette, and also asked her if Canadian GST tax would be 
> applied to this order. She contacted Mitch who realized he wanted to look at 
> the ASICs first anyway so he had the shipping address changed to UPenn. 
> Since eight of the chips will be unpackaged, presumably so Mitch can check 
> interior signals, they likely won't need to be sent on to anyone right away. 
> About half of the remaining 32 packaged ASICs could be used to mount on FDC 
> daughter boards for small scale FDC and CDC prototype testing. The question 
> is whether this group of chips need to be tested before they are soldered to 
> the boards. If there is enough confidence in the chips and you want to save 
> time this is not a problem; there are more than a factor of two spare chips 
> for this situation. The remaining packaged ASICs could be sent to Alberta 
> for testing on a board with a test socket which allows testing without 
> soldering to the board. Testing half the ASICs would take about two weeks 
> plus shipping time. Since the delivery schedule from MOSIS has been shifted 
> ahead by one month, there is less time to produce a test board. Perhaps 
> Mitch and Fernando can confirm that the package and bonding diagram have 
> been finalized.
>
> John
>
>     > Hall D Electronics:
>   
>> HI Fernando,
>>
>> I am a little confused. Will there be any testing at Alberta?
>>
>> Thanks, Elton.
>>
>> Elton Smith
>> Jefferson Lab MS 12H5
>> 12000 Jefferson Ave
>> Suite # 16
>> Newport News, VA 23606
>> elton@jlab.org
>> (757) 269-7625
>>
>> On Thu, 10 May 2007, Fernando J. Barbosa wrote:
>>
>>     
>>> Hi Mitch,
>>>
>>>     The BIS-711 export control form has been completed and faxed to Jim
>>> Cousins at MOSIS.
>>> The following is a tentative outline of the next steps:
>>>
>>> 1.    The chips will be shipped to you for testing.
>>> 2.    After testing, these will be shipped to Jlab to be assembled onto
>>> the preamp cards.
>>> 3.    The preamp cards are being designed at Jlab for further tests on
>>> the prototype FDC and CDC wire chambers.
>>> 4.    I will circulate a test spec sheet that we can use for qualifying
>>> the chips.
>>>
>>> Please let me know if there are other steps that need to be considered
>>> at this time.
>>>
>>> Best regards,
>>> Fernando
>>>
>>> Mitch Newcomer wrote:
>>>       
>>>> Design   77419  (GAS-1)
>>>> Fab-ID is T74LAB
>>>> PO: 0000087100
>>>>
>>>> RE>>>>The project will be shipped to:
>>>>      Dr. J. PINFOLD   C/O SUZETTE CHAN
>>>>      UNIV. OF ALBERTA CENTRAL RECEIVING
>>>>      MATERIAL MGT. BUILDING CEB 445
>>>>      116 STREET & 85 AVENUE
>>>>      EDMOND AB  T6G 2R3
>>>>
>>>>
>>>> Please ship all 40  parts to the following US address:
>>>>           Mitch Newcomer
>>>>           University of Pennsylvania
>>>>           209 S 33rd St,
>>>>           Philadelphia, PA  19104
>>>>               These parts will be bench tested at Penn before assembly
>>>> on boards
>>>>
>>>> Mitch Newcomer.
>>>>
>>>>         
>
>
>
> John Schaapman                   Ph: 780-492-3043
> Centre for Particle Physics     Fax: 780-492-3408
> CEB-158
> Mailstop #615
> University of Alberta            
> Edmonton, AB
> CANADA       T6G 2G7
>