Re: FDC meeting minutes

["Fernando J. Barbosa" <barbosa@jlab.org>]

Hi Gerard,

I have attached the preliminary schematic and layout for the preamp card.

I have not included a pulser in the card - the test/calibration pulse is 
input via the 25th pair, distributed to all 24 channels on the board via 
capacitive coupling (trace area overlap) and terminated at the 
characteristic impedance of the cable. This is standard fare and 
provides enough flexibility. This requires the pulsing circuit to be 
located on the fADC-100 which can be controlled via VME.

Major factors are: the power dissipation on a 24 channel board is 
already over 1 Watt, heat removal is difficult and space is very 
limited. There is also the option of putting the pulser circuitry on the 
translator board as long as there is not much power involved. I must say 
I don't like this option because of serviceability issues. Putting the 
pulser circuitry on the card is possible, however, but we need to 
consider the power supply, power dissipation and size and noise issues.

The general philosophy is:

1. The +3V supply is distributed to the various preamp cards via the 
translator boards. Each translator board can be fed from the power 
supply or daisy-chained, depending on space constraints and current. 
High precision +2.5V regulators are required and installed on each card 
to service all 24 channels. I outlined why the ASIC supply must be well 
regulated on a previous email.

2. The same power connector may include a threshold voltage input to be 
distributed to every preamp card. If the card does not have any 
discriminators (Mitch is interested in incorporating these into the 
final ASIC), the Vth line is not used locally. I have not updated the 
schematic with this feature.

3. We will use the same form factor for the anodes, i.e. 24 channels, so 
we can use the same connectors and cables.

4. Heat removal from each preamp card is effected by conduction via a 
flexible copper wire of the required cross section and length (~10 
inches) to a collector/radiator plate placed between the detector 
packages and attached to the support rods/structure. The final design 
has not been completed.

5. Serviceability - all active circuitry must be easily accessible and 
replaced to minimize experimental downtime.

    I am open to suggestions and I welcome any comments you may have. I 
also suggest that we meet and discuss these issues further during your 
visit to Jlab.

Regards,
Fernando


Gerard Visser wrote:
> Hi Fernando,
>     Of course, that's understood, that it is only a preliminary 
> version at this stage. But if you have schematic and layout plots 
> enough to have discussed them at the meeting, I think it would be 
> interesting to see them... Can you post them to the portal (or send 
> directly if you prefer)? In particular I'd like to understand the 
> overall layout, and to see details on the pulser and pulser control 
> interface, and the power scheme. I have some ideas for the pulser, 
> using only the one extra pair in the 50-conductor cable to control it; 
> I bought some parts but haven't had time to play with it yet. Perhaps 
> I can try it next week. But maybe you already have a circuit worked 
> out for this?
>
>     Gerard
>
> Fernando J. Barbosa wrote:
>> Hi Gerard,
>>
>> I have not released the final version yet. Please note that this is a 
>> study based on the prototype preamp ASIC. I am re-checking dimensions 
>> as there is not much space available. I am also performing thermal 
>> simulations which affect the final design.
>>
>> Regards,
>> Fernando
>>
>> Gerard Visser wrote:
>>
>>> Is Fernando's preamplifier board design available/posted somewhere? 
>>> It would be good to have a chance to comment on it. Thanks,
>>>
>>>     Gerard

gluex_preamp_card_gpc01.pdf

gpc01_fab.pdf

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